
PSW Series Programming Manual
90
IEEE 488.2 Common Commands
*CLS ........................................................................................ 90
*ESE ........................................................................................ 90
*ESR ........................................................................................ 90
*IDN ....................................................................................... 91
*OPC ....................................................................................... 91
*RST ........................................................................................ 91
*SRE ........................................................................................ 92
*STB ........................................................................................ 92
*TRG ....................................................................................... 92
*TST ........................................................................................ 92
*WAI ....................................................................................... 93
The *CLS command clears the Standard Event
Status, Operation Status and Questionable Status
registers. The corresponding Enable registers in
each of the above registers are not cleared.
If a <NL> newline code immediately precedes a
*CLS command, the Error Que and the MAV bit in
the Status Byte Register is also cleared.
Sets or queries the Standard Event Status Enable
register.
Returns the bit sum of the Standard Event
Status Enable register.
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