
COMMNAND OVERVIEW
31
*SRE?
>12
Bits 2 and 3 are set in the Service Request Enable
register.
Reads the Status Byte register. This command will
not clear the Status Byte register.
If the Master Summary Status bit (MSS) is set, it
indicates that there is a reason for a service
request.
Note: Bit 1 and 2 cannot be set, however bit 2 (ERR)
can be returned.
*STB?
>36
Bits 2 and 5 are set in the Status Byte register.
This command triggers the unit.
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